Thesis Archive
IC Design Of A CMOS Bandgap Reference with Trimming using Synopsys EDA (2012)
ESG-01-1112-01
Jan Tricia Grace A. Baybay, Niño Angelo C. Cadiz, Carlvinn S. Celemin and Daryl R. Sng, advised by Roman A. Palo
Abstract:
-From the analog-to-digital and digital-to-analog converter domination in the market and with most of them requiring a constant voltage and temperature in order to operate, a Bandgap Voltage Reference is used. This research focuses on a Bandgap Voltage Reference that uses pure complementary metal-oxide semiconductor or CMOS technology to compensate for easier manufacturing process and less bulking effects in the output circuit. The circuit has a temperature range of – c and a VDD range of 1.2V to 1.5V with a limit of no more than (+/-) 0.005V variation for the outputreference voltage of 0.5 Volts. The circuit will also be featuring a start up circuit and a digital trimming technique. The circuit is tested at five process corners: Typical-Typical (TT), Slow-Slow (SS), Fast-Slow (FS), Slow-Fast (SF) and Fast-Fast (FF) and simulated using the SYNOPSYS EDA under the 90nm library.
Correspondence:
Roman A. Palo
[email protected]